IDE ATA 存储

集成驱动电子设备将磁盘专用控制逻辑移入驱动器，并 standardized the host-facing registers and commands. The resulting ATA family dominated PC storage before Serial ATA, but several related names describe different parts of that history.

术语 #

Four terms should not be treated as exact synonyms:

• IDE means Integrated Drive Electronics, the architectural change that placed controller logic with the mechanism. Enhanced IDE (EIDE) was a later collection of extensions and product terminology.
• ATA began as the AT Attachment interface and now names the standards family, including commands, registers, protocols, and device behavior.
• PATA is the retrospective name for ATA’s parallel electrical interface after Serial ATA required a distinction.
• ATAPI defines a packet-command protocol over ATA transport. Optical drives and other devices use it to carry commands derived from the SCSI command sets rather than pretending to be ATA disks.

SATA changes cabling, signaling, and topology while retaining much of the ATA command model. A modern ATA command description can therefore apply beyond a 40-pin IDE ribbon cable.

主机、通道与设备拓扑 #

A host adapter exposes one or more ATA channels. A parallel channel has shared command, control, and 16-bit data signals and can attach up to two devices. The devices are conventionally called master and slave, or device 0 and device 1. Those names select bus identities; they do not mean that one drive routes all commands to the other.

Jumpers can assign identities explicitly. Cable-select mode instead uses the CSEL conductor and connector wiring to determine them. The host writes the device bit in the Device/Head register, waits for selection to settle as the standard requires, and then accesses the selected device’s register set. Only one command protocol occupies the shared channel at a time under traditional operation.

Original cables used 40 conductors. Faster Ultra DMA modes require an 80-conductor cable with the same 40-pin connectors; additional ground conductors reduce crosstalk. Shared signaling, short cable limits, and timing margins constrained further parallel scaling, which helped motivate SATA’s point-to-point links.

任务文件与设备识别 #

Software controls a legacy ATA device through a command-block register set often called the task file, plus control-block registers. Register roles include:

The host loads parameters and writes the command register last. It then follows the command’s specified PIO or DMA protocol while interpreting status bits such as BSY, DRQ, ERR, and DRDY. Polling arbitrary registers while BSY is set can violate the protocol because only specified status accesses are valid during that phase.

IDENTIFY DEVICE returns 256 16-bit words describing an ATA disk. Defined words report the model and serial strings, supported command sets, active transfer modes, logical-sector properties, queueing features, and addressable capacity. ATAPI devices answer IDENTIFY PACKET DEVICE instead. Reserved bits and words must not be inferred, and support and enablement bits are distinct: a feature can be implemented but not currently enabled.

CHS、LBA28 与 LBA48 #

Early commands exposed cylinder, head, and sector fields for BIOS and DOS compatibility. Device firmware translated those values because reported geometry ceased to match physical media. Logical block addressing instead numbers sectors linearly.

The original ATA LBA form carries 28 address bits: 24 in the three LBA registers and four in Device/Head. With 512-byte sectors, its address space is:

2^28 sectors × 512 bytes = 128 GiB = 137,438,953,472 bytes

LBA48 commands expand the address to 48 bits and the sector count to 16 bits. On the legacy task file, software writes the high-order bytes before the corresponding low-order bytes, then issues an EXT command such as READ SECTORS EXT. At 512 bytes per sector, 48 bits address 128 PiB. Actual devices and operating systems can impose smaller limits, and drives with larger logical sectors change byte capacity without changing the LBA count.

The value zero has command-specific maximum-count semantics in the sector-count field—256 sectors for many 28-bit commands and 65,536 for corresponding 48-bit commands. Drivers must follow the selected command definition rather than interpret zero as an empty request.

PIO、DMA 与 Ultra DMA #

ATA transfer modes describe how sector data crosses the host interface:

• Programmed I/O (PIO) makes the processor read or write the Data register for every word. The device uses DRQ to delimit data phases.
• Single-word and multiword DMA let a host DMA engine transfer data after the driver programs memory descriptors and issues an ATA DMA command.
• Ultra DMA (UDMA) uses source-synchronous strobes, transfers on both strobe edges, and adds a CRC over each burst. Higher modes tighten timing and require the 80-conductor cable on PATA.

DMA reduces processor-managed data movement, but ATA command setup, completion, error handling, cache flushes, and DMA mapping remain driver responsibilities. A CRC error protects the cable transfer; it does not provide end-to-end validation of media contents.

The host and device negotiate modes from IDENTIFY data and SET FEATURES. Selecting a mode unsupported by the cable, controller, or device can corrupt transfers, thus drivers apply platform limits rather than choosing the largest device-advertised number.

持久的块设备边界 #

Integrated control and LBA gave operating systems a stable array-of-sectors abstraction. Filesystems and partition tables could operate on logical blocks without scheduling head movement or encoding a drive’s physical geometry. ATA still exposes media errors and performance details, but the mechanism decides how an LBA maps to tracks, flash pages, spare sectors, or an internal translation layer.

参考资料 #

• INCITS T13 technical committee
• Linux libata developer documentation